وصف الوظيفة
Job Qualifications:
- B.Sc. Electronics or Computer with V. Good with honor(minimum).
- Solid experience with Verilog and/or System Verilog
- Knowledge of FPGA Design Flow and Digital HW Design
- A very good communicator in English, proactive, and team player.
Nice To Have:
- Graduation project relates to memory controllers, SoC buses or similar.
- Knowledge of Scripting Languages: Perl/Tcl.
Job Description:
- Understanding and executing JEDEC standards of memory Protocols
- Design & Implement Softmodels memories for emulation and Veloce environments
- Debugging simulation & emulation based verification.